Self-Evolving Chip-Design Harness

**Self-Evolving Chip-Design Harness**: an AI harness that fixes its own agents, proven where results can't be faked. Getting a chip to hit its clock speed is a slow, expert loop: every change must be re-verified and fully placed and routed before you know if it helped. AI agents can run that loop, but humans still hand-tune the harness around them. We made the harness tune itself. Strands agents (models via OpenRouter) rewrite a multiply-accumulate array's Verilog; every design is gated by a randomized testbench and scored by full open-source place-and-route (Yosys + OpenROAD). When progress stalls, an evolution agent reads the trial history in MongoDB Atlas, diagnoses why, and writes a new harness version (prompt, tools, context, compute policy), kept only if it beats its parent.