field-ratchet: a recursively self-improving AI for PCB design.

Electrical design engineers often have to place and route boards by hand — agonizing over where the buck switching node goes, how far the crystal sits from the noisy regulator, whether the USB pair stays balanced, which decap hugs which power pin, etc, etc — then run DRC, find the field-risk and EMI problems, rip it up, and do it again, carrying hard-won intuition from one board to the next that never actually compounds into the tool. Fieldratchet turns that loop into an executable, self-improving compiler: feed it a KiCad schematic and it parses, classifies, places, routes, and scores a real KiCad board, where placement is a coupled-oscillator (Kuramoto) substrate — the netlist compiles into phase oscillators (shared nets become attractive/synchronizing couplings placed near each other, noisy↔sensitive nets become repulsive/anti-phase couplings kept apart), steered by a conditioning block of board intent, thermal hotspots, and engineer feedback, with hundreds of phase-seeds raced and each synchronized field decoded to coordinates via coord = board_size · sigmoid(a·sinθ + b·cosθ) — and then it gets better at the act of designing itself: each iteration mutates its own optimizer (coupling gains, drives, damping, readout) and only promotes a change when the canonical geometric + field-risk score improves and an independent damped-wave EMI voxel solver (refining 4 mm down to 10 µm inside hotspots) doesn't regress, so the best score is monotonically non-increasing (a true ratchet), and the evolved substrate transfers — a substrate improved on one board makes the optimizer ~24% better on an unseen board with zero new feedback, beating simulated annealing by 78% on our 187-component autonomy mainboard — all fully offline (no kicad-cli, no network, no API keys), shipping as an Electron app + CLI. Repo: https://github.com/JacobFV/fieldratchet

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